Hekate 6.4.2 / Nyx 1.8.2

Supports booting ALL current CFWs, Android, Linux and payload tools.
No more SD card removals

Latest HOS supported: 21.0.1

hekate v6.4.0 brought massive changes, in case you missed them check v6.4.0 changelog

hekate v6.4.2 changes

• Fixed an issue that could cause a black screen or hanging in hekate logo (Nyx)
  There was an undocumented silicon errata that affected a fraction of users with T210 (Erista) devices.
• A new forced 8GB RAM config payload is now provided for RAM modded devices
  You can use hekate_ctcaer_x.x.x**__ram8GB**.bin via rcm injection, payload.bin, etc, in case you have a modded Switch with 8GB ram.
  It will automatically set the ram config to update.bin too if it doesn’t match. No need to copy it there.
  Just make sure you use the 8GB variant as the first injected/loaded hekate payload.
  You can see more about this in How to update. (Users with normal 4GB devices should not use it.)
• Several other improvements and fixes

Nyx v1.8.2 changes

• The HW Info fuses pane was greatly improved
  Compacted and grouped relevant values together
  Used the actual names only instead of register names where possible
  Product code and FAB/LOT codes will now show exactly what’s on the die markings
• A Wafer graph was added in HW Info to show where the die was located in the wafer
  Pairing this with speedo, it might show which areas are the best on average.
• Fixed an issue that could cause hanging in Nyx init while hekate logo was showing
• Fixed an issue with dumping Joy-Con BT Pairing from Nyx Options menu.
• BPMP clock is now more stable and some badly binned devices might withstand a higher clock (bpmpclock in nyx.ini)
  That’s by fixing another undocumented silicon errata that affects both T210 and T210B01
• Added checks to the Date/Time roller for Day so it doesn’t allow it to exceed per month max day
  The checks existed when saving, although somewhat broken (fixed now), but now they are also visual.
• Several other improvements and fixes

BDK changes

• CLOCK: Refactored all module clock enable/reset logic into using SET/CLR registers
• CLOCK: The above also fixes an undocumented silicon errata that affects a fraction of T210 and makes SDMMC hang
• CLOCK: Improved PLLC init/config to mitigate an undocumented silicon errata that exists in both T210 and T210B01
• CLOCK: Refactored PLL lock delays
• FUSES: A fuse_force_8gb_dramid function was added that when called once, makes fuse_read_dramid(false) return a 8GB DRAM ID.
• MTC: minerva_init now takes minerva storage as argument in order to avoid using Nyx storage
• MTC: A new minerva_deinit function was added that automatically sets freq to 204 MHz and invalidates the config
• BDK: Removed dependency to Nyx storage from everything in BDK.